x86/mwait-idle: disable IBRS during long idle
authorPeter Zijlstra <peterz@infradead.org>
Thu, 13 Oct 2022 15:55:22 +0000 (17:55 +0200)
committerJan Beulich <jbeulich@suse.com>
Thu, 13 Oct 2022 15:55:22 +0000 (17:55 +0200)
commit08acdf9a26153130d7fa47925ceb53c39fcb87da
tree1788cd54a93d3cef46e0f1459839c5fcd34a40f7
parent0fa9c3ef1e9196e8cd38c1532d29cf670dc21bcb
x86/mwait-idle: disable IBRS during long idle

Having IBRS enabled while the SMT sibling is idle unnecessarily slows
down the running sibling. OTOH, disabling IBRS around idle takes two
MSR writes, which will increase the idle latency.

Therefore, only disable IBRS around deeper idle states. Shallow idle
states are bounded by the tick in duration, since NOHZ is not allowed
for them by virtue of their short target residency.

Only do this for mwait-driven idle, since that keeps interrupts disabled
across idle, which makes disabling IBRS vs IRQ-entry a non-issue.

Note: C6 is a random threshold, most importantly C1 probably shouldn't
disable IBRS, benchmarking needed.

Suggested-by: Tim Chen <tim.c.chen@linux.intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Signed-off-by: Borislav Petkov <bp@suse.de>
Reviewed-by: Josh Poimboeuf <jpoimboe@kernel.org>
Signed-off-by: Borislav Petkov <bp@suse.de>
Origin: git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git bf5835bcdb96
Signed-off-by: Jan Beulich <jbeulich@suse.com>
Acked-by: Roger Pau Monné <roger.pau@citrix.com>
Release-acked-by: Henry Wang <Henry.Wang@arm.com>
xen/arch/x86/cpu/mwait-idle.c
xen/include/xen/cpuidle.h